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Samsung, SK Hynix slide as Google touts AI memory compression tech ‘TurboQuant’

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Samsung, SK Hynix slide as Google touts AI memory compression tech ‘TurboQuant’

Google researchers unveiled TurboQuant, an algorithm that could reduce AI working memory requirements; Samsung fell 4.8% and SK Hynix fell 5.9% on the news, the KOSPI slid as much as 3%, and U.S. memory peers dropped 3–6%. If TurboQuant proves viable and is widely adopted it could materially slow industry demand for advanced memory chips, posing downside risk to memory makers' revenue and capital spending; Google will present TurboQuant at ICLR 2026 in April.

Analysis

The structural implication to price formation is asymmetric: a durable decline in working-memory per-inference reduces the marginal cost of hosting and serving large models, which flows straight to cloud provider unit economics (lower incremental capex and power per model) and can meaningfully compress the addressable upgrade cycle for DRAM/HBM. If adoption is meaningful within 6–18 months, DRAM/HBM demand could rebase down 10–30% from recent peak order rates, turning current fab utilization and ASP assumptions into the primary downside for memory capex plans and equipment vendors servicing those fabs. Second-order winners include hyperscalers and content-hosting layers that monetize model density (improved gross margins per rack), and software-layer players that reduce inference cost per query; second-order losers are the narrow HBM suppliers and GPU/SKU segments tailored to very high memory footprints — those SKU mixes are most at risk of ASP compression even if aggregate GPU compute demand holds. A staggered adoption path (experiments 3–6 months, production pilots 6–12 months, wide rollout 12–24 months) is the base case, so market pricing will be driven as much by pilot announcements and cloud-hosted benchmarks as by academic publication. Key catalysts to watch are reproducibility and integration: a failed reproduction or demonstrated latency/accuracy tradeoff will reverse the move quickly (days–weeks), whereas fast integration by one hyperscaler (proof-of-deployment within 3–6 months) materially increases downside for memory suppliers over the ensuing 6–12 months. Tail risks cut both ways — an implementation bug or security/robustness limitation keeps memory intensity intact (sharp snapback), while coordinated capex cuts by fabs could create undersupply and force a recovery; both scenarios require tight, time-bound hedges rather than buy-and-hold exposure.