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Chinese chip firms hit record high revenue driven by the AI boom and U.S. curbs

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Chinese chip firms hit record high revenue driven by the AI boom and U.S. curbs

SMIC reported 2025 revenue up 16% YoY to $9.3B (LSEG estimates put 2026 revenue > $11B); Hua Hong posted Q4 revenue of $659.9M and guided $650–$660M, while Moore Threads guided 2025 revenue of ¥1.45–1.52B (up 231–247% YoY). CXMT saw revenue jump ~130% YoY to >¥55B (~$8B), driven by memory shortages and surging AI demand. Growth is being amplified by U.S. export curbs that have boosted domestic procurement, but Chinese firms still lag technologically (no ASML EUV access) and face risks of overcapacity in mature nodes.

Analysis

China’s forced onshoring of compute and memory is creating a captive, high-margin domestic market that cushions local suppliers from direct global competition and raises the value of local capacity investments. That captive-demand dynamic is a durable source of revenue but concentrates downside risk: if inventory cycles or global memory-price normalization occur, domestic players with slower process nodes will be first to suffer pricing pressure because their competitive moat is policy-dependent rather than technology-led. Second-order supply-chain winners include pure-play tool and foundry partners who sit one step upstream from the capability race — firms that control critical masks, testing, or packaging tooling can monetize China’s scale even when EUV remains barred. Conversely, vendors with direct China-facing GPU/IP exposure face a bifurcated TAM: premium parts (EUV-era GPUs) remain out of reach, while lower-tier GPUs and mature-node silicon see volume and margin compression over time as capacity comes online. Key catalysts and timing: near term (weeks–months) watch memory price signals and large OEM procurement cadence; medium term (6–18 months) watch capacity additions and HBM3 qualification timelines that will determine whether pricing holds; long term (2–5 years) the big policy/capability inflection is whether domestic tooling and advanced node competence materially narrow the performance gap versus TSMC/ASML, which remains the hardest and slowest vector to close. The consensus leans bullish on pure revenue growth but underprices an inventory-led mean reversion and overweights policy-insulation as a sustainable moat. A pragmatic playbook monetizes the asymmetric outcomes: capture exposure to foundry/tool duopolies while hedging semiconductor OEMs with outsized China revenue sensitivity.