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Intel Wildcat Lake Lineup And Specifications Leaked: Six SKUs, 1/2+4-Core Configuration, And Up To 35W TDP

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Technology & InnovationProduct LaunchesArtificial IntelligenceCompany Fundamentals

Leaked Intel Wildcat Lake specifications show a 15-35W TDP range (substantially higher than prior 6-7W ultra-low-power parts) and up to 4.8 GHz P‑core Turbo on flagship Core 7 360. Most SKUs use a 2 P‑Core + 4 LP‑E Core design (Core 3 304 is 1+4), all with 1.5 GHz P‑core and 1.4 GHz LP‑E base clocks and 6 MB L3 cache. iGPU is 2x Xe3 cores (up to 2.6 GHz) delivering 9–21 AI TOPs, while the NPU is rated ~15–17 TOPs. This is a leak of the Core 300 series lineup rather than an official release, so details and pricing/timing remain unconfirmed.

Analysis

Intel’s decision to shift the mainstream laptop SKU design toward a higher sustained power envelope is a strategic move that will reframe OEM tradeoffs between peak performance and battery/runtime economics. Expect laptop BOMs to rise modestly as vendors add more robust VRMs, thicker thermal stacks, and active cooling in thin-and-light segments — a $10–$40 ASP hit is plausible at scale and will influence gross margins and channel pricing over the next 3–12 months. Second-order winners are suppliers of power-delivery and thermal subsystems: analog PMIC and MOSFET vendors, chassis assemblers with thermal expertise, and memory partners where higher sustained clocks push bandwidth choices. Conversely, the most efficient ARM and custom-silicon offerings (which sell on fanless, all-day battery life) regain a clearer product distinction: consumers chasing battery/runtime will continue to prefer those platforms, slowing wholesale displacement in the ultra-mobile niche. A weaker on-die AI accelerator creates a bifurcation in workload routing: consumer AI features will remain limited, increasing demand for cloud/edge offload and discrete accelerators for creators and enterprise AI inference. This raises a shorter-term upside for datacenter GPU/accelerator vendors but exposes Intel to enterprise procurement cycles that prize measurable AI throughput — a mismatch that could delay meaningful share gains into the 12–24 month window. Key catalysts to watch are validated third-party benchmarks and OEM design-win announcements at major shows within 1–3 months; driver/firmware power management and silicon yields are the primary tail risks that can erase any advantage at launch. A negative early review cycle would compress ASPs and slow channel adoption, whereas clean benchmark beats combined with broad OEM adoption would support a rapid re-rating over 6–18 months.