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[News] Samsung Groq Orders May Jump ~70% to 15K Wafers; Tesla Reportedly Delays Other Foundry Clients

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Groq has increased its Samsung foundry order from ~9,000 wafers to ~15,000 wafers as it moves from sampling to early commercial inference-AI production; Groq was reportedly acquired indirectly by NVIDIA for about $20B. Samsung may gain a foothold in inference AI chips, while HyperAccel’s processors are also being produced on Samsung’s 4nm process. Separately, Tesla’s postponement of MPW production has reportedly delayed DeepX’s DX-M2 2nm NPU by ~6 months (originally scheduled for April), and Tesla is negotiating to expand its 2nm AI6 wafer contract from 16,000 to potentially ~40,000 wafers/month.

Analysis

NVIDIA’s indirect ecosystem play into inference is creating a bifurcation: training-focused incumbency retains scale advantages, while inference optimizations (lower memory bandwidth, SRAM-centric designs) open a new demand vector that favors foundries and designers able to deliver low-latency, cost-efficient chips at volume. That architectural tilt is a structural change — it reduces the marginal value of HBM-heavy designs for many inference use cases and raises the commercial importance of mature-node density, package co-design, and in-die SRAM efficiency, shifting pricing power away from HBM vendors toward foundries and advanced packaging specialists. Capacity allocation at cutting-edge nodes is now a strategic choke point. Large, flexible buyers (OEMs and hyperscalers) can monetize priority at the expense of smaller AI chip startups; a single large OEM reorder can postpone multi-customer prototyping windows and force startups to either accept later ramps or migrate to alternative foundries, accelerating consolidation among fab-lite chip designers. The spillover winner is whoever can quickly absorb displaced demand — if Samsung’s 2nm/4nm bays are contested, expect TSMC and Intel to see shorter-term share gains and negotiation leverage to increase. Key catalysts to watch in the coming weeks-to-months are product reveals (which crystallize architectural wins), quarterly foundry guidance (capacity allocations and ASPs), and MPW/wafer-schedule confirmations from tier-1 customers — each can flip economics rapidly. Tail risks that would reverse the current read include 2nm yield degradation, an unexpectedly fast industry pivot back to HBM-based inference niches, or regulatory friction around ecosystem M&A that limits cross-licensing and distribution, any of which would re-route orders and valuations within quarters rather than years.