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Goldman Sachs picks two stocks that could benefit from a chip designer shortage

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Goldman Sachs picks two stocks that could benefit from a chip designer shortage

Goldman cited a structural shortage of chip-design engineers, estimating Agentic AI could add ~$3.7B of incremental EDA revenue by 2030 (not in Street models, potentially visible in H2 2026). It upgraded Cadence (CDNS) target to $470 from $410, implying ~26% upside from $384.17 close, while maintaining a $600 12-month target for Synopsys (SNPS) but flagging export-restriction and share-loss risks. Separately, TSMC reported June sales up 67.9% YoY and 1H 2026 revenue of NT$2.4T ($74.99B), up 35.6% YoY, supporting the broader AI chip demand backdrop despite growing caution on AI spending.

Analysis

The real monetization angle is not “AI demand” per se; it is labor substitution in a bottlenecked workflow. If agentic design tools can compress engineering headcount, CDNS should get a pricing umbrella and higher gross margin per customer because the buyer is paying to avoid hiring scarce talent, not just to buy software seats. That makes the revenue pool more resilient than generic enterprise software and creates a second-order winner in TSM: more custom silicon attempts mean more tape-outs, more advanced-node demand, and higher mask-set complexity, even if some projects fail.

SNPS looks more mixed because it likely has the largest absolute exposure to the same trend but also the most to lose if customers use AI to pressure renewal pricing or if export controls inhibit China-related design activity. In other words, the market may reward the category while still rotating relative share toward the cleaner growth story; CDNS has the better near-term multiple re-rate setup, while SNPS is more vulnerable to “good business, but not enough upside surprise.” The downstream losers are in-house design teams at smaller AI chip startups and any EDA-adjacent service model that relies on scarce human design labor rather than software leverage.

The catalyst path is slow-burn: little should show up in reported numbers before 2H26, so the trade is about positioning ahead of estimate revisions, not chasing the print. The contrarian risk is that this becomes a 2026 story that the Street already partially discounts once the AI capex cycle matures; if custom silicon order growth decelerates or export restrictions tighten further, the labor-shortage thesis can stall quickly. The clean falsifier is any evidence that design-automation spend is not growing faster than overall semiconductor R&D budgets by mid-2026, or that CDNS/SNPS guide only to maintenance-type growth despite AI commentary.