Semiconductor Lead Times Surge Across Multiple Segments, Baird Reports By Investing.com

DRAM lead times for mobile LPDDR5 and DDR5 have stretched to 41 weeks (the highest in Baird’s dataset), Xilinx FPGAs to 40 weeks, and MOSFETs average 25 weeks with Diodes/Vishay/Onsemi at 37/31/26 weeks respectively. DC-to-DC (MPS) is at 33 weeks, LCD driver ICs 25 weeks, and Onsemi SiC 24 weeks, signaling an acceleration of the semiconductor upcycle that began in late Q1 2025. Baird remains constructive on cyclical semiconductor names, implying tighter supply could support pricing and earnings for suppliers. Monitor inventory and pricing data for component vendors and distributors for potential upside in sector earnings momentum.

Analysis

The stretch in lead times is acting like a near-term revenue amplifier for suppliers that can convert backlog into higher ASPs and that have differentiated product roadmaps; firms with strong analog/DC-DC franchises and sticky design wins should see the cleanest margin upside over the next 3–9 months. Conversely, commodity-focused discrete suppliers and those with concentrated OEM customers face a higher probability of margin mean reversion if OEMs push for alternative sourcing or if channel customers opportunistically destock.

Second-order supply-chain effects include accelerated qualification of alternate suppliers and increased content substitution toward suppliers who can promise delivery windows — this favors vertically integrated or higher-engineering-content vendors because qualification friction creates a 2–4 quarter moat. The biggest structural reversal risk is capacity additions: foundry and OSAT CAPEX decisions that are announced and ramp within 12–24 months can materially compress lead times, so keep a calendar on major CAPEX announcements and capacity utilization datapoints.

For tail-risk monitoring, watch end-market demand signals (smartphone ASPs, auto EV production cadence, and datacenter GPU build schedules); a synchronized end-market slowdown would flip order books to cancellations within 0–3 months and crush the current pricing tailwind. On the margin, the market is underpricing idiosyncratic execution — companies that report 10–20% sequential backlog conversion with stable gross margins over two quarters will likely rerate faster than consensus expects.

Key Decisions for Investors

• Pair trade (primary): Go long MPWR (Monolithic Power Systems) for 6–9 months sized at 2–3% portfolio exposure and short DIOD (Diodes Inc) 50–75% of that size. Rationale: asymmetric margin leverage in MPWR vs higher commoditization risk in DIOD. Target: MPWR +25–40% / DIOD -15–25% over 6–9 months. Stop-loss: cut if MPWR underperforms DIOD by >10% in 30 days.
• Options hedge: Buy MPWR 9-month call spread (buy ATM, sell ~+25% OTM) to express the upside with defined cost; finance by selling DIOD 6–9 month put spread (sell slightly OTM, buy further OTM) to monetize premium while retaining capped downside. Expected IRR ~2:1 if thesis executes; max loss limited to net premium paid.
• Event trade (short-term, 0–3 months): If any supplier reports sequential backlog declines or OEMs flag softness in guidance, initiate a tactical short of DIOD using borrow or short-dated puts; this is a catalyst-driven trade where a single guide-down can trigger 15–30% downside.
• Risk management: Monitor monthly book-to-bill and company-specific backlog disclosures; reduce gross exposure by 50% if aggregate industry lead-time surveys reverse for two consecutive months or if new fab CAPEX announcements indicate meaningful capacity additions within a 12–18 month window.