
Micron signed an exclusive LOI to acquire Powerchip's P5 300mm fab in Tongluo, Taiwan for US$1.8 billion, including a 300,000 sq. ft. cleanroom, with the deal expected to close by Q2 2026 subject to agreements and regulatory approvals. Micron will assume control to phase‑equip and ramp DRAM production—targeting meaningful wafer output in H2 2027—while establishing a long‑term relationship with PSMC for post‑wafer assembly and support of PSMC's legacy DRAM portfolio, signaling a strategic capacity expansion in memory manufacturing.
Market structure: Micron's $1.8B LOI for PSMC's 300mm P5 fab (close by Q2 2026, DRAM output H2 2027) gives MU immediate scale optionality and likely benefits semicap vendors (LRCX, AMAT) via equipment orders in 2026–2027. Incumbent DRAM peers (Samsung SSNLF, SK Hynix 000660.KS) face modest share pressure; if Micron's incremental capacity ramps to even mid-single-digit percent of industry wafer output by 2028, it can compress ASPs if industry demand growth <10%/yr. Buyers of memory (cloud operators) are a secondary beneficiary through downward price pressure. Risk assessment: Key tail risks are regulatory denial or China/Taiwan geopolitical disruption (low-probability, >$1B impact), equipment lead-time and integration delays that push production beyond H2 2027, and capex overruns that strain Micron's free cash flow. Near-term (days/weeks): share reaction to announcement and rumor flow; short-term (months): regulatory milestones through Q2 2026; long-term (2027+) execution and wafer-start metrics matter. Hidden dependencies include supplier allocations (LAM/AMAT delivery schedules) and PSMC workforce relocation timelines that could add 6–18 months. Trade implications: Tactical allocation: moderately bullish MU — establish a 2–3% long equity position, scale to 4% if deal closes by Q2 2026; hedge with an 18–30 month MU call spread (buy LEAP call, sell higher strike) to cap cost. Relative trade: long MU vs short 000660.KS (or SSNLF) 12–24 month horizon to express share-shift risk; add 1–2% longs in LRCX/AMAT to capture equipment tailwinds. Entry on pullback >5% or confirmation of regulatory approval; trim on 20–30% gains or if Micron pushes wafer-start guidance below internal threshold (e.g., <50% of planned capacity by end-2027). Contrarian angles: Consensus praises capacity lift but underappreciates execution/cost risk — market may be underpricing potential margin compression in 2028 if DRAM ASPs fall 10–20% from increased supply. Historical parallels: Intel’s fab buys produced long integration cycles and heavy capex drain; Micron could face similar opportunity costs for next-gen node investment. Unintended consequence: accelerated price competition could trigger capacity curtailments across the industry, creating a volatile multi-year cycle rather than steady share gains for MU.
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