TSMC chip capacity is ‘fierce’ battleground for AI customers, amid record quarter

TSMC reported record profit for a sixth consecutive quarter and expects fourth-quarter revenue to rise 58% year over year, as AI demand strains its wafer capacity. The company said it had capacity for more than 17 million 12-inch-equivalent wafers last year, while U.S. hyperscalers are projecting well over $700 billion in capital expenditures this year. TSMC is expanding with new fabs in Taiwan, Japan and Arizona and has committed $265 billion to Arizona, but new capacity will take years to come online; analysts warn bottlenecks could threaten AI companies’ infrastructure plans and growth targets.

Analysis

The economic rent in this cycle is shifting upstream: scarce qualified wafer capacity gives TSMC leverage over allocation and potentially pricing, while chip designers’ product plans are only valuable if they secure both logic and memory. The second constraint matters: even abundant TSMC output would not fully remove shipment risk if memory supply remains tight. Hyperscaler capex can therefore convert into delayed deployments rather than near-term accelerator revenue, making downstream growth targets more fragile than capex headlines imply.

Near term, ASML benefits from customers trying to lift output through added tools, but orders are not equivalent to installed, productive capacity. Over 1–3 months, watch TSMC commentary on advanced-node utilization, customer allocations and pricing, plus actual tool delivery/ramp disclosures. Over 6–18 months, new fabs may ease the bottleneck, but qualification, yield and geographic diversification take time. Intel has strategic second-source optionality; do not price it as a near-term capacity substitute until external customer qualification and volume ramps are demonstrated. Samsung is another potential alternative, but its ability to absorb leading-edge demand is likewise a verification item.

Contrarian risk: the bottleneck can amplify TSMC’s strategic value while also capping the revenue conversion of the AI buildout. A long-only “AI demand” framing misses this mismatch. Falsify the scarcity thesis if TSMC’s advanced-node lead times/utilization ease materially, or if hyperscalers indicate delayed deployments and reduce capex; falsify the Intel hedge if it secures meaningful, repeat external orders with credible yield and schedule performance.

Key Decisions for Investors

• Favor TSM (NYSE: TSM) on pullbacks as a capacity-scarcity exposure, but stage entry rather than chase strength. The thesis is allocation leverage and durable demand, not an assumption that every announced fab adds near-term output. Reassess on utilization, advanced-node pricing and capex-to-capacity conversion.
• Consider a measured long TSM / short INTC relative-value pair over the next 1–3 months: TSM captures current scarcity while Intel’s second-source case remains contingent on qualification and execution. Keep the short conditional and reduce it if Intel reports repeat external foundry wins, credible yields and on-time ramps.
• ASML (NASDAQ: ASML) is a constructive picks-and-shovels exposure, but use order conversion and tool deliveries as confirmation rather than treating order interest as revenue. A slowdown in customer commitments or evidence that added tools are not lifting output would weaken the trade.
• Do not indiscriminately add to NVDA, AMD or AVGO on AI demand alone. Track memory availability, wafer allocation and customer deployment timing; if supply constraints persist while hyperscaler capex remains elevated, favor suppliers with capacity leverage over downstream revenue forecasts that require timely chip shipments.